The dusk of ASIC the dawn of ASIP
Every year, Gartner Dataquest presents the day prior to the start of the Design Automation Conference (DAC) facts and trends for the EDA industry. Part of this event is the hand out of a list of the “20 hottest companies and new products” to see. These companies cover the complete bandwidth of EDA—from next generation layout to system level design. This year, five out of these 20 companies were in the segment of “algorithmic engines” or application-specific instruction-set processors (ASIP). While the name ASIP is not very common, most people are familiar with realizations of ASIPs in different application domains: network processors, memory controllers, dedicated DSPs, etc. What makes these processors different from standard RISCs or DSPs and why will they have a big impact on future SoC designs? This article tries to give some answers by motivating the usage of ASIPs from a technical and from a business perspective. Besides, one possible ASIP design solution will be introduced exemplarily.
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