The Best of Both Worlds: A No-Compromise Approach to Advanced Node Parasitic Extraction
The increasing complexity of nanometer design, combined with new effects arising from advanced manufacturing processes, presents a dual threat to the design engineer trying to reach tapeout. A combination of rule-based and field solver engines is necessary to deliver both the parasitic extraction accuracy essential for detailed 3D structures like finFETs, and the performance necessary to enable fast throughput of full-chip designs with many millions of nets on multiple diverse routing layers. Learn more in this white paper.
Please disable any pop-up blockers for proper viewing of this Whitepaper.