Hardware verification engineers have always faced the complexity of concurrent execution and temporal considerations when verifying hardware designs. However, silicon manufacturers are now moving to multicore designs to achieve the relentless drive for improved performance at lower power now demanded by consumers. This pushes the responsibility for realizing that performance to the software community. Rather than simply relying on clock frequency and CPU design improvements to achieve their performance increase, software engineers will need to write their code to take advantage of the additional cores. Testing such software is fraught with potential issues and we will investigate just a few of them in this paper.