Catapult C Synthesis added SystemC support for modeling, verification, and synthesis of complex ASICs at the system level. Both cycle-accurate and transaction-level (TLM) abstractions are supported, addressing SoC-specific needs such as bus interfaces and interconnects as well as connections with ESL flows. This Catapult flow promotes abstraction and design reuse. This paper gives an overview and a detailed example of SystemC support in Catapult.

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