System Level Performance Analysis with Formal Methods and Virtual Prototyping
The timing of modern multiprocessor systems is increasingly difficult to predict due to complex intercomponent timing dependencies. Therefore, reliable methods for performance analysis are essential in order to predict both average case and worst-case behavior. In this paper, we investigate the timing of multiprocessor-systems-on-chips, where computation and communication between the individual application functions is highly entangled producing irregular and unpredictable timing. To meet these challenges, we explore various multiprocessor options empirically with a virtual system prototype (VSP) and formally with system level performance analysis.
Another upcoming challenge for real-time system design is systems evolving through modifications after their deployment. Here an Online Performance Control must ensure adherence to timing constraints during their lifetime. Implementing such a performance control framework on microcontrollers requires real-time operating system development ranging from microkernel adaptations for different target architectures to driver development. We show how virtual prototyping enabled us to quickly develop and efficiently debug the base software of a prototype implementation of an evolving realtime system.
We also briefly discuss requirements for virtual prototyping technology for the described cases above, and how existing technology in the marketplace differs from each other.
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