The 65-nm process node introduces new challenges in chipmakers’ relentless quest to increase device performance while lowering power consumption. With state-of-the-art technology, Altera Stratix III FPGAs leverage the flexible logic structure of the previous-generation, 90-nm Stratix II FPGAs, and combine many innovative power-saving techniques to deliver the benefit of an efficient foundational architecture fully integrated in the Quartus II development software. With Stratix III performance, designers gain a shorter design cycle and reduce cost, while implementing large designs with extremely low power consumption.

This white paper provides benchmarking data showing that Stratix III FPGAs are 35 percent faster than previous generation Stratix II devices, plus detailed architectural analysis demonstrating that the architecture efficiency of Stratix III FPGAs provides a 25 percent performance advantage with a 1.8X more logic packing capacity over competing 65-nm devices.