Spartan-II Family as a Memory Controller for QDR-SRAMs
The explosive growth of the Internet is boosting the demand for high-speed data communication systems. In order to increase memory bandwidth significantly for future high-performance communication applications, Cypress Semiconductor, Integrated Device Technology, Inc. and Micron Technology have jointly defined and developed a new SRAM architecture referred to as the Quad Data Rate (QDR) SRAM technology. FPGAs are ideal to implement the control and interface logic, which ties the CPUs to the QDR SRAMs. The Spartan-II FPGA, with its unique and extensive features is an ideal memory controller interface for the QDR SRAM. Spartan-II FPGAs offer more than 100,000 system gates at under $10 and are the most costeffective programmable logic devices (PLD) solution ever offered.
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