The paper discusses the relative merits of this approach and potential for increased hardware/software visibility and overall flexibility of use. The Mentor Graphics iSolve USB Peripheral provides a high-speed solution for the system-level verification of System-on-Chip (SoC) designs containing a USB 2.0 Host controller port that communicates with USB peripheral mass storage devices such as hard-disk drives, Flash drives, and USB sticks. The current solution, known as the static In-Circuit Emulation (ICE) solution, uses a dedicated hardware unit connected to the Veloce hardware emulator and operates from clocking that is sourced from Veloce. This paper presents a novel approach to providing the same functionality as the static ICE solution, but using a Softmodel instead, which comprises only of synthesized RTL code within Veloce, plus executable software running on a standard Veloce host workstation.

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