Altera’s 28-nm Cyclone V and Arria V SoC FPGAs feature a hard processor system (HPS) containing a MPU with a dual-core ARM Cortex-A9 MPCore processor, a rich set of peripherals, a multi-port memory controller, and FPGA fabric. The tight integration between the HPS and FPGA fabric supports over 100-Gbps peak bandwidth with integrated data coherency between the processors and the FPGA. The included set of hardened embedded peripherals eliminates the need to implement these functions in programmable logic, leaving more FPGA resources for application-specific custom logic. This combination delivers the flexibility of programmable logic with the power and cost savings of hard IP.