As process nodes for integrated circuits (ICs) continue to shrink, their susceptibility to single event upsets (SEUs) due to high-energy particles rises. Specifically, it is the static RAM structures within these devices that pose the greatest concern. The awareness of these risks has long been known in the space community, and that knowledge has spread to other industries, such as networking, avionics, automotive, and now medical. This paper defines what the risks are and explains ways to mitigate and avoid these risks within programmable logic.