Reduce Total System Cost in Portable Applications Using Zero-Power CPLDs
Traditionally, portable system designers have used application-specific integrated circuits (ASICs) and application-specific standard products (ASSPs) to implement memory interfaces, I/O expansion, power-on sequencing, discrete logic functions, display, and other functions in portable systems. Today, however, innovations in complex programmable logic devices (CPLDs) in power reduction, cost optimization, and small form-factor packaging allow PLDs to replace or augment ASICs, ASSPs, and discrete devices in these systems.
The latest zero-power CPLDs have features and capabilities not found in older, macrocell-based predecessors, and offer designers much lower costs and lower power than older CPLD solutions. This paper discusses the challenges facing portable application designers today and explains how zero-power CPLDs can reduce total system cost and board space.
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