Rapid Development of SOPC Builder Hardware Accelerators in C Language
In any product development cycle there are multiple opportunities to reduce cost and/or increase functionality. This is particularly true in higher-end embedded and DSP applications, which are computationally intensive, performance-critical, and require more processing power than can be provided by common microprocessors or low-cost DSP chips. This paper describes how recent advances in FPGA technologies and in software-based methods of FPGA algorithm design provide a compelling alternative for accelerating the performance of embedded and DSP applications.
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