The successful completion of any system-on-chip (SoC) project is dependent on many complex, interrelated factors. Validation that the design is both functionally correct and meets system performance goals is a process of iterative refinement. To achieve the required results, you need a set of powerful design capture, verification, analysis, and refinement tools linked to a productive, easy-to-use flow.

By identifying design bottlenecks and performance concerns—and automating their elimination—a new, tightly integrated SoC design and verification solution from Mentor Graphics addresses these fundamental challenges. An assemblage of specialized tools, this solution enables you to improve design productivity, design quality, and project delivery schedules of an ARM microprocessor-based system.

Reprinted in its entirety from ARM IQ Vol. 3, No. 2