Protection Design Guide for Telecom & Networking Interfaces
Today’s digital communication integrated circuits (ICs) and transceivers are faster, more efficient, consume less power, and are smaller than ever before. Yet the advances in IC technology and enhanced chip performance has come with a notable tradeoff: increased susceptibility to damage from ESD, cable discharge and lightning. Not only are transistor geometry sizes scaling at a remarkable pace, leading to more sensitive circuits, but the on-chip protection is increasingly being sacrificed in favor of accommodating greater performance in the chip. As this trend progresses, high performance system level transient voltage protection will be needed more than ever before.
Please disable any pop-up blockers for proper viewing of this Whitepaper.