Programmable clock frequency dividers play an integral role in contemporary SoC designs which need clocks of different frequencies in different run modes. Fractional clock frequency dividers are a special type of divider circuits where the dividing factor is a fraction. This paper presents a programmable fractional clock frequency divider which uses purely digital components and can achieve division factors in the multiples of 0.5. The paper will corroborate the results with the help of circuit diagram and the simulation results.