It is often difficult to find an analog-to-digital converter (ADC) that aligns with the analog input range, but also has the appropriate number of inputs, the needed size, and the correct sample speed. Especially for system designers working with wide voltage swings, there is a concern that scaling down the input signal to drive an ADC’s full-scale range can significantly degrade the signal-to-noise ratio (SNR). This application note discusses what affects this SNR loss, how it can be quantified, and more importantly, how it can be minimized.