The opportunities for optimizing a design for power are greatest at the architectural level of abstraction: the further a design moves downstream the less effective optimization techniques become. Power optimization must begin at the electronic system level (ESL). Vista offers architectural analysis, exploration, and optimization of power and timing at the ESL. It features unique power modeling capabilities and a wide range of power analysis toolsets. Combining Vista with Catapult creates a continuous power optimization path from the system level through synthesis to implementation. This flow and its benefits are described in this paper, along with a demonstration of using power policies to evaluate the effect of different architectural choices on power consumption.

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