By supporting new features like DLL (in the Virtex, Virtex-E, Spartan-II), and DCM (in the Virtex-II and Virtex-II Pro), Precision RTL allows you to seamlessly integrate these critical Xilinx components into your designs. Automatic clock propagation across DCM/DLL, combined with an integrated place and route environment makes Precision RTL a powerful synthesis solution for designing with newer Xilinx devices. In addition, Precision RTL provides excellent DCM/DLL timing analysis and attribute-editing capabilities during post-compile or post-synthesis.

This application note provides DCM/DLL design and coding guidelines, along with code snippet examples that show you how to instantiate DCM and pass its attributes in VHDL and defparams in Verilog. The paper also provides further links from where you can download a complete set of CLKDLL and DCM coding examples for both VHDL and Verilog.

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