The flexible and fully integrated FPGA configurations from Xilinx take advantage of FPGA capabilities like remote updating and reconfiguration. Each configuration option has different speed and complexity tradeoffs and can offer you the flexibility of sharing configuration memory with other system-level tasks, thus greatly reducing total cost. This article describes the unique features and considers the trade-offs of each Xilinx FPGA configuration.


Before the introduction of the Xilinx Spartan-3E, Spartan-3A, and Virtex-5 families, designers who configured Xilinx FPGAs with commodity flash would use a three-chip configuration solution: a commodity flash PROM, a CPLD, and of course the FPGA. The newer FPGAs eliminate the need for a CPLD (or other controller) by providing a direct interface for leading commodity flash devices, thus reducing the chip count to one memory device.