Traditional physical synthesis techniques rely on lengthy place-and-route iterations to achieve good quality of results (QoR). Newer routing-centric approaches suffer from very long run times and limited device support while post-placement-centric physical synthesis provides only limited QoR improvements. To address these issues, a unique and innovative pre-place-and-route, physically-aware synthesis based on the concept of statistical timing analysis is needed. This approach achieves QoR comparable to newer generation physical synthesis, yet reduces run times significantly and enables the EDA vendor to offer broad vendor and device support.

Note: By clicking on the above link, this paper will be emailed to your TechOnline log-in address by Mentor Graphics.