Advances in process technology have lead to dramatic increases in FPGA device densities. Several Xilinx® Virtex™ families have devices exceeding 1 million system gates. This increase in device density and the use of 300 mm wafers have made FPGAs affordable for volume production.

Designs that were once exclusively targeted at ASICs are now being implemented in programmable devices. The largest 90 nm Virtex-4 device provides more than 200,000 logic cells, 6 MB of block RAM, and nearly 100 DSP blocks. Creating a design to efficiently utilize the available resources in these devices and meet performance requirements can be challenging. Fortunately, today’s EDA software tools have evolved to meet these challenges.

Reprinted with permission from Xcell Journal / Fourth Quarter 2005. Article © Xcell Journal.