This paper describes the key elements of the physical design methodology developed for the design of a 0.13um system on a chip. The Parama PNI8160 “ADM on a Chip” was the first device that was developed using this methodology and was proven to be successful in the first pass of the silicon. This paper focuses on the key elements relevant to a small fables semiconductor organization doing large system-on-a-chip implementations. Critical topics include flip-chip technology challenges, high-speed/low-jitter clock distribution methods, signal integrity for DSM designs, power distribution and critical timing closure performed in a hierarchical fashion.