Designing software for ARM technology-based systems requires verifying that it functions correctly with the hardware, but also that the performance is optimized for both the processor core and the memory architecture subsystem in which it is running. Ideally, all of this should be done very early in the design cycle before hardware prototypes have been created. ARM processors, such as the ARM926EJ-S™ and ARM1136J(F)-S™ cores, have features such as the Tightly Coupled Memories (TCMs) and varied cache sizes, so understanding the performance of real-time software and how the TCMs and the cache memories can be tuned could have a significant affect on the overall performance, cost, and power consumption of the final system.

Reprinted in its entirety from ARM IQ Vol. 3, No. 4