MPEG4 and the proprietary data compression algorithms developed at Packet Video allow rich multimedia content to be delivered over very low bandwidth connections, such as wireless cellular protocols. While developing these compression and decompression algorithms, we needed to maximize the compute power of the 3G handset platforms and guarantee the delivery of streaming multi-media to the variety of these devices. Many of these 3G handsets are based on various ARM processors.

This paper will outline our use of instruction set simulators and co-verification tools to determine the performance of these complex algorithms on a wide variety of ARM based hardware designs. By running on a “virtual-prototype” using co-verification we were able to analyze a large number of architecture variations, including different ARM processors, cache sizes, and memory architectures. This analysis allowed us to find critical performance bottlenecks in the software and hardware and identify the attributes of ARM based systems which would efficiently deliver MPEG4 multimedia data streams.