Best Practices to Solve Design and Parasitic Extraction Challenges of Capacitors in RF Design Applications
When deciding which process technology is the right fit for their 5G or IOT applications, RF designers can choose from compact fin field-effect transistor (finFET) technologies or fully-depleted silicon-on-insulator (FDSOI) technologies, both of which can meet performance and power requirements while keeping process costs, complexity, and footprint low. These process technologies allow designers to integrate a wide spectrum of devices (e.g., high-performing RF/mmWave transistors with logic devices) to address a variety of market segments, including mobile, IoT, analog, and RF/mmWave.
This paper focuses on the design and parasitic extraction (PEX) challenges of capacitors in RF design applications, and proposes best practices to solve those challenges, illustrated by experimental results.
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