The increasing volume of data collected, communicated, and stored in everything from 5G to industrial applications has expanded the performance limits of analog signal processing devices, some into the gigasamples per second. As the pace of innovation never slows, the next generation of electronics solutions will lead to further shrinking in solution volumes, increasing power efficiency, and greater demand for better noise performance.

This paper gives an overview of how to quantify the power supply noise sensitivity of the loads in signal processing chain, and how to calculate the maximum acceptable power supply noise. Measurement setups and strategies to meet power domain sensitivity with realistic power supply noise requirements are also discussed.