Optimizing Performance of DSP Systems through Block-Level Design
While experienced software developers and system designers are familiar with software implementations of algorithms, they often struggle to adapt to the requirements of silicon implementation. Using high-level languages like MATLAB makes it easy to develop new algorithms, but design teams still struggle to determine which micro-architecture for key functions are the most effective and efficient for a specific design. Even the implementation of a function as simple as a square root can have a dramatic effect on the noise, area, and frequency of the entire system. This paper describes the benefits of alternative architectures and micro-architectures for key DSP building blocks such as FFT/IFFT, math functions, and forward error correction in terms of throughput, latency, power, noise, frequency, and area and how tools can automate this tradeoff analysis.
Please disable any pop-up blockers for proper viewing of this Whitepaper.