Optimizing DSP: Low Power by Architecture
Modern DSPs for third generation wireless products have conflicting requirements. While these products require high performance, low power consumption is also key. This article will demonstrate that performance problems cannot be solved by simply increasing operating frequency while relying on technology improvements for low power. Instead, DSP architectures need to be adapted specifically for low power operation. Parallel architectures are one of the key methodologies in this area, as demonstrated in the Philips Semiconductors R.E.A.L. DSP architecture.*
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