This paper investigates strategies for improvement for Oracle/Sun Microsystem’s UltraSPARC T1, a 64-bit multi-core multiprocessor with open source design specifications, Hypervisor source code, and related tools. The proposed hierarchical structures for managing power saving involve an intra-core local power management unit (LPMU) and a chip-level global power management unit (GPMU) that makes intelligent power-saving decisions about the cores. The paper explores the limitations of modern multi-core embedded systems and summarizes possible solutions to maximize power efficiency.