Minimizing the Cost of Using Free Processor IP
While field programmable gate array (FPGA) manufacturers’ tool suites offer a quick and effective way to target an existing starter board, the flow does not necessarily provide the most optimal integration into the designer’s chosen computer-aided design (CAD) flow. A designer wanting to take advantage of the MicroBlaze embedded processor IP while trying to minimize deviations from their chosen CAD flow might consider a strategy that uses Platform Studio primarily as a netlist generator for their custom application, and then uses their preferred synthesis and debug tools for the remainder of the design. This paper explores how to
use Precision Synthesis to synthesize MicroBlaze subsystems.
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