The demands on embedded processors are growing faster than CPU developers can respond. This has lead to a number of academic and commercial processors, such as Tensilica [13, 14] and ARC [15], which allow hardware extensions in the form of new instructions to improve the overall throughput. Unfortunately, it is rarely obvious at the application level which new instruction would accelerate a given function. This paper proposes a design flow that migrates performance critical sections of software into hardware by automatically creating application specific hardware blocks that accelerate the overall software execution. The hardware implementation of the function is interfaced to the general-purpose processor, which runs the remainder of the software. Targeting FPGA fabric maintains the reprogrammable nature of the algorithm that was originally in software. We will present our results on this flow on the G.729 audio encoding algorithm.

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