There has been a lot of buzz lately about a new interface called JESD204B. This new interface standard addresses the digital interconnect between high-speed data converters and the digital processor or FPGA. It uses a high-speed serial interface to transfer the digital data as opposed to the traditional, lower speed CMOS or LVDS interfaces. While this new interface promises many benefits, such as reduced overall design complexity, board space and cost savings, the system designer needs to carefully consider various design aspects when making the switch to the JESD204B interface. This paper examines the system implications around the JESD204B interface.