Parallel bus structures are giving way to newer and faster giga-bit/second serial communication links, processor driven I/O’s and channeled architectures, yielding an array of new standards and protocols. Embedded Standard Product IP cores, such as PCI and LVDS SERDES, provide solutions to bridge the gap in this transition period from parallel to serial. The combination of embedded standard functions and customizable logic enables designers to change with the standards without having to make heavy investments or take large risks on new standards, while addressing the needs for connectivity across networks, servers and storage devices. This paper explains how-to design a multi-channel custom serial link in a single chip.