Low Power Standard Cell and Memory Solutions for 32/28nm SoC
Multi-million gate designs in leading edge processes like 32/28nm are nowadays “true system on a chip solutions”. As such they are no longer a homogenous system with unique performance and power requirements within the system and over time. As such they require very advanced power management features to cope with conflicting requirements. This paper describes key aspects of the physical IP, like multi-channel standard cell solutions, power management techniques and memory compiler solutions for low voltage and high performance support.
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