As feature sizes of CMOS transistors are further scaled down to increase circuit performance and packing density, interconnect (RC) delay, power dissipation and cross-talk, due to coupling capacitance, rapidly increase. To offset the impact of the capacitance increase on circuit performance, low K dielectrics having a dielectric constant of less than 4.1 have been developed to replace the conventional silicon dioxide (SiO2) that has been employed to form intermetal dielectric (IMD).

For more information on Low-K Dielectrics, visit Semiconductor Insights’ Web site.