There is a growing need for low-cost solutions for SERDES-based designs. As PCI Express- and Serial Ethernet-based standards become ubiquitous and an integral part of FPGA designs, there will be a need for an accompanying low-cost FPGA to handle the relatively lower-performance bridging, co-processing, and glue logic functionality of those designs. Lattice has addressed these needs with its ECP2M family of devices.

The keys to achieving a low cost SERDES design are to adequately target the needs of the low-cost SERDES market and to ensure that the design meets the specifications needed to achieve reliable transmission and reception of key serial protocols over nominal PCB (FR-4 based) distances. This paper examines the implementation of these multi-protocol standards and their associated stacks, and discusses why they are ideally suited to an FPGA-based SERDES implementation, such as the Lattice ECP2M family of devices.