With the convergence of communications and computing technologies driving the adoption of PCI Express, Gigabit Ethernet, and Serial RapidIO protocols in cost-sensitive markets, the time is right for certain applications, such as bridging and endpoint designs, to utilize low-cost field-programmable gate arrays (FPGAs) with embedded transceivers. This white paper discusses how these designs, though rapidly becoming commonplace, can still be challenging — both at the board level and for the FPGA designer.

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