Imagine a holistic simulation to emulation flow that allows you to carry over the block-level work you’ve done and re-apply it at the subsystem and system levels. The same testbench, verification IP, coverage metrics, assertions, UPF power aware techniques, and debugging tools are used in simulation and emulation. Never write more than one testbench again! This white paper discusses how:

  • Broadcom developed a single, scalable verification flow and common test environment
  • A unified assertion-based flow allows information to be passed from the block to the subsystem and system integration levels
  • You can maximize the reuse of tests in simulation, acceleration, and co-validation