For deep sub micron technologies, ensuring good yield is becoming challenging. STMicroelectronics has implemented, as a part of its DFM strategy, a methodology based upon LFD. It provides, at design level, a CAD solution to assist end users in targeting good printability over the whole process window and across a wide number of environments. An LFD kit creator has been implemented to fully automate the LFD kit generation based on OPC/RET recipes and models. The kit allows the detection of hot spots, the simulation of gates and interconnects contours. For large blocks or full chips, a Fast mode is also implemented. In addition, a way to calibrate such an LFD kit has been put in place which consists in guaranteeing the alignment with respect to silicon data. To compare the different approaches of DFM strategy, an analysis is driven between model-based (LFD) and a rule-based approach (ST’s DFM Toolbox Solution based on CFA). The accuracy, run time and sensitivity are analyzed in detail.

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