Programmable logic devices (PLDs) have long been used as primary and co-processors in telecommunications. The input data are commonly audio data rates with strict timing constraints such as completing the calculations between successive input data samples. With a DSP processor, this only allows for a few tens of thousands of instructions for the entire calculation.


An alternative to using a DSP processor for high-bandwidth computations is using a PLD as a co-processor that integrates the repetitive, speed-critical portions of an algorithm into the PLD. With a PLD and Altera’s new automated design software, the engineer has the ability to optimize system performance in ways not possible with a traditional DSP.