Improvements in Post-OPC Data Constraints for Enhanced Process Corrections
This work demonstrates significantly improved 2-D OPC correction results based on matching movement constraints to inspection limitations. Improvements are demonstrated on a created array of 2D designs as well as critical level chip designs used in 45nm technology. Enhancements to OPC efficacy are proven for several types of features. Improvements in overall EPE (edge placement error) are demonstrated for several different types of structures, including mushroom type landing pads, iso crosses, and H-bar structures. Reductions in corner rounding are evident for several 2-dimensional structures, and are shown with dense print image simulations. Dense arrays (SRAM) processed with the new constraints receive better overall corrections and convergence. Furthermore, OPC and ORC (optical rules checking) simulations on full chip test sites with the advanced constraints have resulted in tighter EPE distributions, and overall improved printing to target.
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