Implementing Optimal Filters Quickly
The FIR Compiler is available in both System Generator and Core Generator software and is an extremely valuable tool for both DSP algorithm and hardware engineers. It provides rapid generation of difficult-to-implement, high-performance FIR filters and positively impacts design time and risk.
Most importantly, the filters generated take full advantage of the FPGA; consequently, their performance reaches the maximum 400 MHz offered by a Virtex-4 device (-10 slowest speed grade) with extremely efficient resource utilization.
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