This application report contains implementation instructions for the DDR2 memory controller interface contained in the TMS320DM646x digital signal processing (DSP) devices. The approach to specifying interface timing for the DDR2 interface is quite different than that of previous devices, in which device timing was specified in terms of data sheet specifications and simulation models. With the DM646x DDR2 interface, the approach to device timing involves specifying compatible DDR2 devices and providing the PCB routing rule solution directly to the customer. Texas Instruments has performed the simulation and system design work to ensure that DDR2 interface timings are met. The DDR2 system solution is referred to as the DM646x DDR2 collateral; this report describes the content of this collateral.