Implementation of 1-D Daubechies Wavelet Transform on FPGA
The Wavelet Transform has proven to be a useful tool in the field of 1-D and 2-D signal compression systems. Due to the growing importance of this technique, a growing need emerged in many working groups for a development environment that is especially flexible and that can accurately measure the performance of a specific architecture.
Field programmable gate arrays (FPGAs) present a solution, providing a workbench on which to efficiently synthesize and test almost any architecture using hardware description languages such as VHDL, which speed up the design process. This paper explains how such work paves the way for future comparative studies between different architectures or even reuse of this design as a test bench for different filtering structures.
Please disable any pop-up blockers for proper viewing of this Whitepaper.