IEEE Std VHDL 1076.1-1999: The Analog and Mixed-Signal Extensions for VHDL
Analog and mixed-signal designers have long lacked what their digital colleagues have enjoyed for a decade: standard hardware description languages that allow portability of models between different EDA tools. At last the effort to add analog and mixed-signal modeling to the IEEE standard language VHDL is bearing fruit. The new standard language for analog and mixed-signal design, VHDL-AMS, won the approval of voting IEEE members and passed the final hurdles of the IEEE standardization process in the spring of 1999. Several commercial and academic implementations of the language are now avail-able. Here are the reasons the effort was worthwhile, along with a brief review of who is making and using VHDL-AMS software, and a taste of what it is like to code models in VHDL-AMS.
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