For many years, chip makers have routinely embedded test and measurement functionality into their high-end, high-speed devices. As a result, there is a great wealth of test and measurement, and design-for-test (DFT) intellectual property (IP) embedded on-chip that can be put to good use in a wide range of applications to more cost-effectively validate, test and debug chips, circuit boards and systems throughout their entire life-cycles. The new IEEE P1687 Internal JTAG (IJTAG) standard is a step in this direction. This paper describes the objectives of the IEEE P1687 working group, how it achieved those objectives and the resulting IJTAG architecture that is embodied in the standard.