Modern power delivery systems with DSPs, FPGAs and CPUs run on lower supply voltages and consume higher current. In fact, sub-1V voltages are everywhere now. Meanwhile, intermediate bus voltages have stayed the same or increased depending on the application. To make things more challenging for power supply designers, system frequency requirements have steadily increased to support smaller inductor and capacitor (L&C) filtering. This paper examines the trends influencing narrow on-time POL conversion and compares the current mode control architectures typically used, including their strengths and weaknesses, as well as a hybrid valley current mode architecture with adaptive slope compensation.