As a designer, you probably spend a significant amount of time simulating boards and building and testing prototypes. It is critical that the kinds of tests performed on these prototypes are effective in detecting problems that can occur in production or in the field.

DRAM or other memory combined in an FPGA system may require different test methodologies than an FPGA alone. Proper selection of memory design, test, and verification tools reduces engineering time and increases the probability of detecting potential problems. In this article, we’ll discuss the best practices for thoroughly debugging a Xilinx® FPGA design that uses memory.

Reprinted with permission from Xcell Journal / Third Quarter 2005. Article © Xcell Journal.