For both analog-to”digital converters (ADC) and digital-to”analog converters (DAC), system-level specifications have a strong influence on several aspects of the converter’s design, including conversion rate, resolution, power dissipation and silicon area. With a special emphasis on broadband wireless applications, this white paper reviews the design trade-offs ranging from the converter’s sampling rate to the choice of single- or multiple-chip system partitioning. Understanding these choices enables chip architects and designers to optimize their systems in accordance with their particular constraints and the characteristics of the data converters.