Customers are integrating single or multiple ARM Cortex-A15 processors into their SoC designs in order to take advantage of this industry-leading IP. In order to perform manufacturing test for the SoC, a test strategy needs to be adopted and the corresponding DFT implemented to achieve that test strategy. Traditionally, it has been up to the design-for-test (DFT) engineer to understand the test strategy and implement the DFT associated with it.